1116 lines
25 KiB
C
1116 lines
25 KiB
C
/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/**
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* Pin mapping for the 1280 and 2560
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*
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* 1280 22 23 24 25 26 27 28 29 53 52 51 50 10 11 12 13 37 36 35 34 33 32 31 30 21 20 19 18 81 82 83 38 00 01 78 05 02 03 79 80 54 55 56 57 58 59 60 61 41 40 39 71 70 04 17 16 84 06 07 08 09 85 15 14 72 73 75 76 77 74 62 63 64 65 66 67 68 69 49 48 47 46 45 44 43 42
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* Port A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 C0 C1 C2 C3 C4 C5 C6 C7 D0 D1 D2 D3 D4 D5 D6 D7 E0 E1 E2 E3 E4 E5 E6 E7 F0 F1 F2 F3 F4 F5 F6 F7 G0 G1 G2 G3 G4 G5 H0 H1 H2 H3 H4 H5 H6 H7 J0 J1 J2 J3 J4 J5 J6 J7 K0 K1 K2 K3 K4 K5 K6 K7 L0 L1 L2 L3 L4 L5 L6 L7
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* Marlin 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
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*/
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#ifndef _FASTIO_1280
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#define _FASTIO_1280
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#include "fastio.h"
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// change for your board
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#define DEBUG_LED DIO21
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// UART
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#define RXD DIO0
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#define TXD DIO1
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// SPI
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#define SCK DIO52
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#define MISO DIO50
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#define MOSI DIO51
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#define SS DIO53
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// TWI (I2C)
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#define SCL DIO21
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#define SDA DIO20
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// Timers and PWM
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#define OC0A DIO13
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#define OC0B DIO4
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#define OC1A DIO11
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#define OC1B DIO12
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#define OC2A DIO10
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#define OC2B DIO9
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#define OC3A DIO5
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#define OC3B DIO2
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#define OC3C DIO3
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#define OC4A DIO6
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#define OC4B DIO7
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#define OC4C DIO8
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#define OC5A DIO46
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#define OC5B DIO45
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#define OC5C DIO44
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// Digital I/O
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#define DIO0_PIN PINE0
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#define DIO0_RPORT PINE
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#define DIO0_WPORT PORTE
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#define DIO0_DDR DDRE
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#define DIO0_PWM NULL
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#define DIO1_PIN PINE1
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#define DIO1_RPORT PINE
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#define DIO1_WPORT PORTE
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#define DIO1_DDR DDRE
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#define DIO1_PWM NULL
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#define DIO2_PIN PINE4
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#define DIO2_RPORT PINE
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#define DIO2_WPORT PORTE
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#define DIO2_DDR DDRE
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#define DIO2_PWM &OCR3BL
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#define DIO3_PIN PINE5
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#define DIO3_RPORT PINE
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#define DIO3_WPORT PORTE
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#define DIO3_DDR DDRE
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#define DIO3_PWM &OCR3CL
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#define DIO4_PIN PING5
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#define DIO4_RPORT PING
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#define DIO4_WPORT PORTG
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#define DIO4_DDR DDRG
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#define DIO4_PWM &OCR0B
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#define DIO5_PIN PINE3
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#define DIO5_RPORT PINE
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#define DIO5_WPORT PORTE
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#define DIO5_DDR DDRE
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#define DIO5_PWM &OCR3AL
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#define DIO6_PIN PINH3
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#define DIO6_RPORT PINH
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#define DIO6_WPORT PORTH
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#define DIO6_DDR DDRH
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#define DIO6_PWM &OCR4AL
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#define DIO7_PIN PINH4
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#define DIO7_RPORT PINH
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#define DIO7_WPORT PORTH
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#define DIO7_DDR DDRH
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#define DIO7_PWM &OCR4BL
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#define DIO8_PIN PINH5
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#define DIO8_RPORT PINH
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#define DIO8_WPORT PORTH
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#define DIO8_DDR DDRH
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#define DIO8_PWM &OCR4CL
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#define DIO9_PIN PINH6
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#define DIO9_RPORT PINH
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#define DIO9_WPORT PORTH
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#define DIO9_DDR DDRH
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#define DIO9_PWM &OCR2B
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#define DIO10_PIN PINB4
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#define DIO10_RPORT PINB
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#define DIO10_WPORT PORTB
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#define DIO10_DDR DDRB
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#define DIO10_PWM &OCR2A
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#define DIO11_PIN PINB5
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#define DIO11_RPORT PINB
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#define DIO11_WPORT PORTB
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#define DIO11_DDR DDRB
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#define DIO11_PWM NULL
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#define DIO12_PIN PINB6
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#define DIO12_RPORT PINB
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#define DIO12_WPORT PORTB
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#define DIO12_DDR DDRB
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#define DIO12_PWM NULL
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#define DIO13_PIN PINB7
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#define DIO13_RPORT PINB
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#define DIO13_WPORT PORTB
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#define DIO13_DDR DDRB
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#define DIO13_PWM &OCR0A
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#define DIO14_PIN PINJ1
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#define DIO14_RPORT PINJ
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#define DIO14_WPORT PORTJ
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#define DIO14_DDR DDRJ
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#define DIO14_PWM NULL
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#define DIO15_PIN PINJ0
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#define DIO15_RPORT PINJ
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#define DIO15_WPORT PORTJ
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#define DIO15_DDR DDRJ
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#define DIO15_PWM NULL
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#define DIO16_PIN PINH1
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#define DIO16_RPORT PINH
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#define DIO16_WPORT PORTH
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#define DIO16_DDR DDRH
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#define DIO16_PWM NULL
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#define DIO17_PIN PINH0
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#define DIO17_RPORT PINH
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#define DIO17_WPORT PORTH
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#define DIO17_DDR DDRH
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#define DIO17_PWM NULL
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#define DIO18_PIN PIND3
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#define DIO18_RPORT PIND
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#define DIO18_WPORT PORTD
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#define DIO18_DDR DDRD
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#define DIO18_PWM NULL
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#define DIO19_PIN PIND2
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#define DIO19_RPORT PIND
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#define DIO19_WPORT PORTD
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#define DIO19_DDR DDRD
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#define DIO19_PWM NULL
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#define DIO20_PIN PIND1
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#define DIO20_RPORT PIND
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#define DIO20_WPORT PORTD
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#define DIO20_DDR DDRD
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#define DIO20_PWM NULL
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#define DIO21_PIN PIND0
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#define DIO21_RPORT PIND
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#define DIO21_WPORT PORTD
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#define DIO21_DDR DDRD
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#define DIO21_PWM NULL
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#define DIO22_PIN PINA0
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#define DIO22_RPORT PINA
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#define DIO22_WPORT PORTA
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#define DIO22_DDR DDRA
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#define DIO22_PWM NULL
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#define DIO23_PIN PINA1
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#define DIO23_RPORT PINA
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#define DIO23_WPORT PORTA
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#define DIO23_DDR DDRA
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#define DIO23_PWM NULL
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#define DIO24_PIN PINA2
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#define DIO24_RPORT PINA
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#define DIO24_WPORT PORTA
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#define DIO24_DDR DDRA
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#define DIO24_PWM NULL
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#define DIO25_PIN PINA3
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#define DIO25_RPORT PINA
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#define DIO25_WPORT PORTA
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#define DIO25_DDR DDRA
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#define DIO25_PWM NULL
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#define DIO26_PIN PINA4
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#define DIO26_RPORT PINA
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#define DIO26_WPORT PORTA
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#define DIO26_DDR DDRA
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#define DIO26_PWM NULL
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#define DIO27_PIN PINA5
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#define DIO27_RPORT PINA
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#define DIO27_WPORT PORTA
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#define DIO27_DDR DDRA
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#define DIO27_PWM NULL
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#define DIO28_PIN PINA6
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#define DIO28_RPORT PINA
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#define DIO28_WPORT PORTA
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#define DIO28_DDR DDRA
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#define DIO28_PWM NULL
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#define DIO29_PIN PINA7
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#define DIO29_RPORT PINA
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#define DIO29_WPORT PORTA
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#define DIO29_DDR DDRA
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#define DIO29_PWM NULL
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#define DIO30_PIN PINC7
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#define DIO30_RPORT PINC
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#define DIO30_WPORT PORTC
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#define DIO30_DDR DDRC
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#define DIO30_PWM NULL
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#define DIO31_PIN PINC6
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#define DIO31_RPORT PINC
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#define DIO31_WPORT PORTC
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#define DIO31_DDR DDRC
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#define DIO31_PWM NULL
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#define DIO32_PIN PINC5
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#define DIO32_RPORT PINC
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#define DIO32_WPORT PORTC
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#define DIO32_DDR DDRC
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#define DIO32_PWM NULL
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#define DIO33_PIN PINC4
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#define DIO33_RPORT PINC
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#define DIO33_WPORT PORTC
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#define DIO33_DDR DDRC
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#define DIO33_PWM NULL
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#define DIO34_PIN PINC3
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#define DIO34_RPORT PINC
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#define DIO34_WPORT PORTC
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#define DIO34_DDR DDRC
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#define DIO34_PWM NULL
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#define DIO35_PIN PINC2
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#define DIO35_RPORT PINC
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#define DIO35_WPORT PORTC
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#define DIO35_DDR DDRC
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#define DIO35_PWM NULL
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#define DIO36_PIN PINC1
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#define DIO36_RPORT PINC
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#define DIO36_WPORT PORTC
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#define DIO36_DDR DDRC
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#define DIO36_PWM NULL
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#define DIO37_PIN PINC0
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#define DIO37_RPORT PINC
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#define DIO37_WPORT PORTC
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#define DIO37_DDR DDRC
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#define DIO37_PWM NULL
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#define DIO38_PIN PIND7
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#define DIO38_RPORT PIND
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#define DIO38_WPORT PORTD
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#define DIO38_DDR DDRD
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#define DIO38_PWM NULL
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#define DIO39_PIN PING2
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#define DIO39_RPORT PING
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#define DIO39_WPORT PORTG
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#define DIO39_DDR DDRG
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#define DIO39_PWM NULL
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#define DIO40_PIN PING1
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#define DIO40_RPORT PING
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#define DIO40_WPORT PORTG
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#define DIO40_DDR DDRG
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#define DIO40_PWM NULL
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#define DIO41_PIN PING0
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#define DIO41_RPORT PING
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#define DIO41_WPORT PORTG
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#define DIO41_DDR DDRG
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#define DIO41_PWM NULL
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#define DIO42_PIN PINL7
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#define DIO42_RPORT PINL
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#define DIO42_WPORT PORTL
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#define DIO42_DDR DDRL
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#define DIO42_PWM NULL
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#define DIO43_PIN PINL6
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#define DIO43_RPORT PINL
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#define DIO43_WPORT PORTL
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#define DIO43_DDR DDRL
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#define DIO43_PWM NULL
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#define DIO44_PIN PINL5
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#define DIO44_RPORT PINL
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#define DIO44_WPORT PORTL
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#define DIO44_DDR DDRL
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#define DIO44_PWM &OCR5CL
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#define DIO45_PIN PINL4
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#define DIO45_RPORT PINL
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#define DIO45_WPORT PORTL
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#define DIO45_DDR DDRL
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#define DIO45_PWM &OCR5BL
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#define DIO46_PIN PINL3
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#define DIO46_RPORT PINL
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#define DIO46_WPORT PORTL
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#define DIO46_DDR DDRL
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#define DIO46_PWM &OCR5AL
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#define DIO47_PIN PINL2
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#define DIO47_RPORT PINL
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#define DIO47_WPORT PORTL
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#define DIO47_DDR DDRL
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#define DIO47_PWM NULL
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#define DIO48_PIN PINL1
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#define DIO48_RPORT PINL
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#define DIO48_WPORT PORTL
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#define DIO48_DDR DDRL
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#define DIO48_PWM NULL
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#define DIO49_PIN PINL0
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#define DIO49_RPORT PINL
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#define DIO49_WPORT PORTL
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#define DIO49_DDR DDRL
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#define DIO49_PWM NULL
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#define DIO50_PIN PINB3
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#define DIO50_RPORT PINB
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#define DIO50_WPORT PORTB
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#define DIO50_DDR DDRB
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#define DIO50_PWM NULL
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#define DIO51_PIN PINB2
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#define DIO51_RPORT PINB
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#define DIO51_WPORT PORTB
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#define DIO51_DDR DDRB
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#define DIO51_PWM NULL
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#define DIO52_PIN PINB1
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#define DIO52_RPORT PINB
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#define DIO52_WPORT PORTB
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#define DIO52_DDR DDRB
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#define DIO52_PWM NULL
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#define DIO53_PIN PINB0
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#define DIO53_RPORT PINB
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#define DIO53_WPORT PORTB
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#define DIO53_DDR DDRB
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#define DIO53_PWM NULL
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#define DIO54_PIN PINF0
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#define DIO54_RPORT PINF
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#define DIO54_WPORT PORTF
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#define DIO54_DDR DDRF
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#define DIO54_PWM NULL
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#define DIO55_PIN PINF1
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#define DIO55_RPORT PINF
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#define DIO55_WPORT PORTF
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#define DIO55_DDR DDRF
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#define DIO55_PWM NULL
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#define DIO56_PIN PINF2
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#define DIO56_RPORT PINF
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#define DIO56_WPORT PORTF
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#define DIO56_DDR DDRF
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#define DIO56_PWM NULL
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#define DIO57_PIN PINF3
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#define DIO57_RPORT PINF
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#define DIO57_WPORT PORTF
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#define DIO57_DDR DDRF
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#define DIO57_PWM NULL
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#define DIO58_PIN PINF4
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#define DIO58_RPORT PINF
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#define DIO58_WPORT PORTF
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#define DIO58_DDR DDRF
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#define DIO58_PWM NULL
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#define DIO59_PIN PINF5
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#define DIO59_RPORT PINF
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#define DIO59_WPORT PORTF
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#define DIO59_DDR DDRF
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#define DIO59_PWM NULL
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#define DIO60_PIN PINF6
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#define DIO60_RPORT PINF
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#define DIO60_WPORT PORTF
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#define DIO60_DDR DDRF
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#define DIO60_PWM NULL
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#define DIO61_PIN PINF7
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#define DIO61_RPORT PINF
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#define DIO61_WPORT PORTF
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#define DIO61_DDR DDRF
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#define DIO61_PWM NULL
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#define DIO62_PIN PINK0
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#define DIO62_RPORT PINK
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#define DIO62_WPORT PORTK
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#define DIO62_DDR DDRK
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#define DIO62_PWM NULL
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#define DIO63_PIN PINK1
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#define DIO63_RPORT PINK
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#define DIO63_WPORT PORTK
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#define DIO63_DDR DDRK
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#define DIO63_PWM NULL
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#define DIO64_PIN PINK2
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#define DIO64_RPORT PINK
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#define DIO64_WPORT PORTK
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#define DIO64_DDR DDRK
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#define DIO64_PWM NULL
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#define DIO65_PIN PINK3
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#define DIO65_RPORT PINK
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#define DIO65_WPORT PORTK
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#define DIO65_DDR DDRK
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#define DIO65_PWM NULL
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#define DIO66_PIN PINK4
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#define DIO66_RPORT PINK
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#define DIO66_WPORT PORTK
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#define DIO66_DDR DDRK
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#define DIO66_PWM NULL
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#define DIO67_PIN PINK5
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#define DIO67_RPORT PINK
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#define DIO67_WPORT PORTK
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#define DIO67_DDR DDRK
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#define DIO67_PWM NULL
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#define DIO68_PIN PINK6
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#define DIO68_RPORT PINK
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#define DIO68_WPORT PORTK
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#define DIO68_DDR DDRK
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#define DIO68_PWM NULL
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#define DIO69_PIN PINK7
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#define DIO69_RPORT PINK
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#define DIO69_WPORT PORTK
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#define DIO69_DDR DDRK
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#define DIO69_PWM NULL
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#define DIO70_PIN PING4
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#define DIO70_RPORT PING
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#define DIO70_WPORT PORTG
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#define DIO70_DDR DDRG
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#define DIO70_PWM NULL
|
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|
|
#define DIO71_PIN PING3
|
|
#define DIO71_RPORT PING
|
|
#define DIO71_WPORT PORTG
|
|
#define DIO71_DDR DDRG
|
|
#define DIO71_PWM NULL
|
|
|
|
#define DIO72_PIN PINJ2
|
|
#define DIO72_RPORT PINJ
|
|
#define DIO72_WPORT PORTJ
|
|
#define DIO72_DDR DDRJ
|
|
#define DIO72_PWM NULL
|
|
|
|
#define DIO73_PIN PINJ3
|
|
#define DIO73_RPORT PINJ
|
|
#define DIO73_WPORT PORTJ
|
|
#define DIO73_DDR DDRJ
|
|
#define DIO73_PWM NULL
|
|
|
|
#define DIO74_PIN PINJ7
|
|
#define DIO74_RPORT PINJ
|
|
#define DIO74_WPORT PORTJ
|
|
#define DIO74_DDR DDRJ
|
|
#define DIO74_PWM NULL
|
|
|
|
#define DIO75_PIN PINJ4
|
|
#define DIO75_RPORT PINJ
|
|
#define DIO75_WPORT PORTJ
|
|
#define DIO75_DDR DDRJ
|
|
#define DIO75_PWM NULL
|
|
|
|
#define DIO76_PIN PINJ5
|
|
#define DIO76_RPORT PINJ
|
|
#define DIO76_WPORT PORTJ
|
|
#define DIO76_DDR DDRJ
|
|
#define DIO76_PWM NULL
|
|
|
|
#define DIO77_PIN PINJ6
|
|
#define DIO77_RPORT PINJ
|
|
#define DIO77_WPORT PORTJ
|
|
#define DIO77_DDR DDRJ
|
|
#define DIO77_PWM NULL
|
|
|
|
#define DIO78_PIN PINE2
|
|
#define DIO78_RPORT PINE
|
|
#define DIO78_WPORT PORTE
|
|
#define DIO78_DDR DDRE
|
|
#define DIO78_PWM NULL
|
|
|
|
#define DIO79_PIN PINE6
|
|
#define DIO79_RPORT PINE
|
|
#define DIO79_WPORT PORTE
|
|
#define DIO79_DDR DDRE
|
|
#define DIO79_PWM NULL
|
|
|
|
#define DIO80_PIN PINE7
|
|
#define DIO80_RPORT PINE
|
|
#define DIO80_WPORT PORTE
|
|
#define DIO80_DDR DDRE
|
|
#define DIO80_PWM NULL
|
|
|
|
#define DIO81_PIN PIND4
|
|
#define DIO81_RPORT PIND
|
|
#define DIO81_WPORT PORTD
|
|
#define DIO81_DDR DDRD
|
|
#define DIO81_PWM NULL
|
|
|
|
#define DIO82_PIN PIND5
|
|
#define DIO82_RPORT PIND
|
|
#define DIO82_WPORT PORTD
|
|
#define DIO82_DDR DDRD
|
|
#define DIO82_PWM NULL
|
|
|
|
#define DIO83_PIN PIND6
|
|
#define DIO83_RPORT PIND
|
|
#define DIO83_WPORT PORTD
|
|
#define DIO83_DDR DDRD
|
|
#define DIO83_PWM NULL
|
|
|
|
#define DIO84_PIN PINH2
|
|
#define DIO84_RPORT PINH
|
|
#define DIO84_WPORT PORTH
|
|
#define DIO84_DDR DDRH
|
|
#define DIO84_PWM NULL
|
|
|
|
#define DIO85_PIN PINH7
|
|
#define DIO85_RPORT PINH
|
|
#define DIO85_WPORT PORTH
|
|
#define DIO85_DDR DDRH
|
|
#define DIO85_PWM NULL
|
|
|
|
#undef PA0
|
|
#define PA0_PIN PINA0
|
|
#define PA0_RPORT PINA
|
|
#define PA0_WPORT PORTA
|
|
#define PA0_DDR DDRA
|
|
#define PA0_PWM NULL
|
|
#undef PA1
|
|
#define PA1_PIN PINA1
|
|
#define PA1_RPORT PINA
|
|
#define PA1_WPORT PORTA
|
|
#define PA1_DDR DDRA
|
|
#define PA1_PWM NULL
|
|
#undef PA2
|
|
#define PA2_PIN PINA2
|
|
#define PA2_RPORT PINA
|
|
#define PA2_WPORT PORTA
|
|
#define PA2_DDR DDRA
|
|
#define PA2_PWM NULL
|
|
#undef PA3
|
|
#define PA3_PIN PINA3
|
|
#define PA3_RPORT PINA
|
|
#define PA3_WPORT PORTA
|
|
#define PA3_DDR DDRA
|
|
#define PA3_PWM NULL
|
|
#undef PA4
|
|
#define PA4_PIN PINA4
|
|
#define PA4_RPORT PINA
|
|
#define PA4_WPORT PORTA
|
|
#define PA4_DDR DDRA
|
|
#define PA4_PWM NULL
|
|
#undef PA5
|
|
#define PA5_PIN PINA5
|
|
#define PA5_RPORT PINA
|
|
#define PA5_WPORT PORTA
|
|
#define PA5_DDR DDRA
|
|
#define PA5_PWM NULL
|
|
#undef PA6
|
|
#define PA6_PIN PINA6
|
|
#define PA6_RPORT PINA
|
|
#define PA6_WPORT PORTA
|
|
#define PA6_DDR DDRA
|
|
#define PA6_PWM NULL
|
|
#undef PA7
|
|
#define PA7_PIN PINA7
|
|
#define PA7_RPORT PINA
|
|
#define PA7_WPORT PORTA
|
|
#define PA7_DDR DDRA
|
|
#define PA7_PWM NULL
|
|
|
|
#undef PB0
|
|
#define PB0_PIN PINB0
|
|
#define PB0_RPORT PINB
|
|
#define PB0_WPORT PORTB
|
|
#define PB0_DDR DDRB
|
|
#define PB0_PWM NULL
|
|
#undef PB1
|
|
#define PB1_PIN PINB1
|
|
#define PB1_RPORT PINB
|
|
#define PB1_WPORT PORTB
|
|
#define PB1_DDR DDRB
|
|
#define PB1_PWM NULL
|
|
#undef PB2
|
|
#define PB2_PIN PINB2
|
|
#define PB2_RPORT PINB
|
|
#define PB2_WPORT PORTB
|
|
#define PB2_DDR DDRB
|
|
#define PB2_PWM NULL
|
|
#undef PB3
|
|
#define PB3_PIN PINB3
|
|
#define PB3_RPORT PINB
|
|
#define PB3_WPORT PORTB
|
|
#define PB3_DDR DDRB
|
|
#define PB3_PWM NULL
|
|
#undef PB4
|
|
#define PB4_PIN PINB4
|
|
#define PB4_RPORT PINB
|
|
#define PB4_WPORT PORTB
|
|
#define PB4_DDR DDRB
|
|
#define PB4_PWM &OCR2A
|
|
#undef PB5
|
|
#define PB5_PIN PINB5
|
|
#define PB5_RPORT PINB
|
|
#define PB5_WPORT PORTB
|
|
#define PB5_DDR DDRB
|
|
#define PB5_PWM NULL
|
|
#undef PB6
|
|
#define PB6_PIN PINB6
|
|
#define PB6_RPORT PINB
|
|
#define PB6_WPORT PORTB
|
|
#define PB6_DDR DDRB
|
|
#define PB6_PWM NULL
|
|
#undef PB7
|
|
#define PB7_PIN PINB7
|
|
#define PB7_RPORT PINB
|
|
#define PB7_WPORT PORTB
|
|
#define PB7_DDR DDRB
|
|
#define PB7_PWM &OCR0A
|
|
|
|
#undef PC0
|
|
#define PC0_PIN PINC0
|
|
#define PC0_RPORT PINC
|
|
#define PC0_WPORT PORTC
|
|
#define PC0_DDR DDRC
|
|
#define PC0_PWM NULL
|
|
#undef PC1
|
|
#define PC1_PIN PINC1
|
|
#define PC1_RPORT PINC
|
|
#define PC1_WPORT PORTC
|
|
#define PC1_DDR DDRC
|
|
#define PC1_PWM NULL
|
|
#undef PC2
|
|
#define PC2_PIN PINC2
|
|
#define PC2_RPORT PINC
|
|
#define PC2_WPORT PORTC
|
|
#define PC2_DDR DDRC
|
|
#define PC2_PWM NULL
|
|
#undef PC3
|
|
#define PC3_PIN PINC3
|
|
#define PC3_RPORT PINC
|
|
#define PC3_WPORT PORTC
|
|
#define PC3_DDR DDRC
|
|
#define PC3_PWM NULL
|
|
#undef PC4
|
|
#define PC4_PIN PINC4
|
|
#define PC4_RPORT PINC
|
|
#define PC4_WPORT PORTC
|
|
#define PC4_DDR DDRC
|
|
#define PC4_PWM NULL
|
|
#undef PC5
|
|
#define PC5_PIN PINC5
|
|
#define PC5_RPORT PINC
|
|
#define PC5_WPORT PORTC
|
|
#define PC5_DDR DDRC
|
|
#define PC5_PWM NULL
|
|
#undef PC6
|
|
#define PC6_PIN PINC6
|
|
#define PC6_RPORT PINC
|
|
#define PC6_WPORT PORTC
|
|
#define PC6_DDR DDRC
|
|
#define PC6_PWM NULL
|
|
#undef PC7
|
|
#define PC7_PIN PINC7
|
|
#define PC7_RPORT PINC
|
|
#define PC7_WPORT PORTC
|
|
#define PC7_DDR DDRC
|
|
#define PC7_PWM NULL
|
|
|
|
#undef PD0
|
|
#define PD0_PIN PIND0
|
|
#define PD0_RPORT PIND
|
|
#define PD0_WPORT PORTD
|
|
#define PD0_DDR DDRD
|
|
#define PD0_PWM NULL
|
|
#undef PD1
|
|
#define PD1_PIN PIND1
|
|
#define PD1_RPORT PIND
|
|
#define PD1_WPORT PORTD
|
|
#define PD1_DDR DDRD
|
|
#define PD1_PWM NULL
|
|
#undef PD2
|
|
#define PD2_PIN PIND2
|
|
#define PD2_RPORT PIND
|
|
#define PD2_WPORT PORTD
|
|
#define PD2_DDR DDRD
|
|
#define PD2_PWM NULL
|
|
#undef PD3
|
|
#define PD3_PIN PIND3
|
|
#define PD3_RPORT PIND
|
|
#define PD3_WPORT PORTD
|
|
#define PD3_DDR DDRD
|
|
#define PD3_PWM NULL
|
|
#undef PD4
|
|
#define PD4_PIN PIND4
|
|
#define PD4_RPORT PIND
|
|
#define PD4_WPORT PORTD
|
|
#define PD4_DDR DDRD
|
|
#define PD4_PWM NULL
|
|
#undef PD5
|
|
#define PD5_PIN PIND5
|
|
#define PD5_RPORT PIND
|
|
#define PD5_WPORT PORTD
|
|
#define PD5_DDR DDRD
|
|
#define PD5_PWM NULL
|
|
#undef PD6
|
|
#define PD6_PIN PIND6
|
|
#define PD6_RPORT PIND
|
|
#define PD6_WPORT PORTD
|
|
#define PD6_DDR DDRD
|
|
#define PD6_PWM NULL
|
|
#undef PD7
|
|
#define PD7_PIN PIND7
|
|
#define PD7_RPORT PIND
|
|
#define PD7_WPORT PORTD
|
|
#define PD7_DDR DDRD
|
|
#define PD7_PWM NULL
|
|
|
|
#undef PE0
|
|
#define PE0_PIN PINE0
|
|
#define PE0_RPORT PINE
|
|
#define PE0_WPORT PORTE
|
|
#define PE0_DDR DDRE
|
|
#define PE0_PWM NULL
|
|
#undef PE1
|
|
#define PE1_PIN PINE1
|
|
#define PE1_RPORT PINE
|
|
#define PE1_WPORT PORTE
|
|
#define PE1_DDR DDRE
|
|
#define PE1_PWM NULL
|
|
#undef PE2
|
|
#define PE2_PIN PINE2
|
|
#define PE2_RPORT PINE
|
|
#define PE2_WPORT PORTE
|
|
#define PE2_DDR DDRE
|
|
#define PE2_PWM NULL
|
|
#undef PE3
|
|
#define PE3_PIN PINE3
|
|
#define PE3_RPORT PINE
|
|
#define PE3_WPORT PORTE
|
|
#define PE3_DDR DDRE
|
|
#define PE3_PWM &OCR3AL
|
|
#undef PE4
|
|
#define PE4_PIN PINE4
|
|
#define PE4_RPORT PINE
|
|
#define PE4_WPORT PORTE
|
|
#define PE4_DDR DDRE
|
|
#define PE4_PWM &OCR3BL
|
|
#undef PE5
|
|
#define PE5_PIN PINE5
|
|
#define PE5_RPORT PINE
|
|
#define PE5_WPORT PORTE
|
|
#define PE5_DDR DDRE
|
|
#define PE5_PWM &OCR3CL
|
|
#undef PE6
|
|
#define PE6_PIN PINE6
|
|
#define PE6_RPORT PINE
|
|
#define PE6_WPORT PORTE
|
|
#define PE6_DDR DDRE
|
|
#define PE6_PWM NULL
|
|
#undef PE7
|
|
#define PE7_PIN PINE7
|
|
#define PE7_RPORT PINE
|
|
#define PE7_WPORT PORTE
|
|
#define PE7_DDR DDRE
|
|
#define PE7_PWM NULL
|
|
|
|
#undef PF0
|
|
#define PF0_PIN PINF0
|
|
#define PF0_RPORT PINF
|
|
#define PF0_WPORT PORTF
|
|
#define PF0_DDR DDRF
|
|
#define PF0_PWM NULL
|
|
#undef PF1
|
|
#define PF1_PIN PINF1
|
|
#define PF1_RPORT PINF
|
|
#define PF1_WPORT PORTF
|
|
#define PF1_DDR DDRF
|
|
#define PF1_PWM NULL
|
|
#undef PF2
|
|
#define PF2_PIN PINF2
|
|
#define PF2_RPORT PINF
|
|
#define PF2_WPORT PORTF
|
|
#define PF2_DDR DDRF
|
|
#define PF2_PWM NULL
|
|
#undef PF3
|
|
#define PF3_PIN PINF3
|
|
#define PF3_RPORT PINF
|
|
#define PF3_WPORT PORTF
|
|
#define PF3_DDR DDRF
|
|
#define PF3_PWM NULL
|
|
#undef PF4
|
|
#define PF4_PIN PINF4
|
|
#define PF4_RPORT PINF
|
|
#define PF4_WPORT PORTF
|
|
#define PF4_DDR DDRF
|
|
#define PF4_PWM NULL
|
|
#undef PF5
|
|
#define PF5_PIN PINF5
|
|
#define PF5_RPORT PINF
|
|
#define PF5_WPORT PORTF
|
|
#define PF5_DDR DDRF
|
|
#define PF5_PWM NULL
|
|
#undef PF6
|
|
#define PF6_PIN PINF6
|
|
#define PF6_RPORT PINF
|
|
#define PF6_WPORT PORTF
|
|
#define PF6_DDR DDRF
|
|
#define PF6_PWM NULL
|
|
#undef PF7
|
|
#define PF7_PIN PINF7
|
|
#define PF7_RPORT PINF
|
|
#define PF7_WPORT PORTF
|
|
#define PF7_DDR DDRF
|
|
#define PF7_PWM NULL
|
|
|
|
#undef PG0
|
|
#define PG0_PIN PING0
|
|
#define PG0_RPORT PING
|
|
#define PG0_WPORT PORTG
|
|
#define PG0_DDR DDRG
|
|
#define PG0_PWM NULL
|
|
#undef PG1
|
|
#define PG1_PIN PING1
|
|
#define PG1_RPORT PING
|
|
#define PG1_WPORT PORTG
|
|
#define PG1_DDR DDRG
|
|
#define PG1_PWM NULL
|
|
#undef PG2
|
|
#define PG2_PIN PING2
|
|
#define PG2_RPORT PING
|
|
#define PG2_WPORT PORTG
|
|
#define PG2_DDR DDRG
|
|
#define PG2_PWM NULL
|
|
#undef PG3
|
|
#define PG3_PIN PING3
|
|
#define PG3_RPORT PING
|
|
#define PG3_WPORT PORTG
|
|
#define PG3_DDR DDRG
|
|
#define PG3_PWM NULL
|
|
#undef PG4
|
|
#define PG4_PIN PING4
|
|
#define PG4_RPORT PING
|
|
#define PG4_WPORT PORTG
|
|
#define PG4_DDR DDRG
|
|
#define PG4_PWM NULL
|
|
#undef PG5
|
|
#define PG5_PIN PING5
|
|
#define PG5_RPORT PING
|
|
#define PG5_WPORT PORTG
|
|
#define PG5_DDR DDRG
|
|
#define PG5_PWM &OCR0B
|
|
|
|
#undef PH0
|
|
#define PH0_PIN PINH0
|
|
#define PH0_RPORT PINH
|
|
#define PH0_WPORT PORTH
|
|
#define PH0_DDR DDRH
|
|
#define PH0_PWM NULL
|
|
#undef PH1
|
|
#define PH1_PIN PINH1
|
|
#define PH1_RPORT PINH
|
|
#define PH1_WPORT PORTH
|
|
#define PH1_DDR DDRH
|
|
#define PH1_PWM NULL
|
|
#undef PH2
|
|
#define PH2_PIN PINH2
|
|
#define PH2_RPORT PINH
|
|
#define PH2_WPORT PORTH
|
|
#define PH2_DDR DDRH
|
|
#define PH2_PWM NULL
|
|
#undef PH3
|
|
#define PH3_PIN PINH3
|
|
#define PH3_RPORT PINH
|
|
#define PH3_WPORT PORTH
|
|
#define PH3_DDR DDRH
|
|
#define PH3_PWM &OCR4AL
|
|
#undef PH4
|
|
#define PH4_PIN PINH4
|
|
#define PH4_RPORT PINH
|
|
#define PH4_WPORT PORTH
|
|
#define PH4_DDR DDRH
|
|
#define PH4_PWM &OCR4BL
|
|
#undef PH5
|
|
#define PH5_PIN PINH5
|
|
#define PH5_RPORT PINH
|
|
#define PH5_WPORT PORTH
|
|
#define PH5_DDR DDRH
|
|
#define PH5_PWM &OCR4CL
|
|
#undef PH6
|
|
#define PH6_PIN PINH6
|
|
#define PH6_RPORT PINH
|
|
#define PH6_WPORT PORTH
|
|
#define PH6_DDR DDRH
|
|
#define PH6_PWM &OCR2B
|
|
#undef PH7
|
|
#define PH7_PIN PINH7
|
|
#define PH7_RPORT PINH
|
|
#define PH7_WPORT PORTH
|
|
#define PH7_DDR DDRH
|
|
#define PH7_PWM NULL
|
|
|
|
#undef PJ0
|
|
#define PJ0_PIN PINJ0
|
|
#define PJ0_RPORT PINJ
|
|
#define PJ0_WPORT PORTJ
|
|
#define PJ0_DDR DDRJ
|
|
#define PJ0_PWM NULL
|
|
#undef PJ1
|
|
#define PJ1_PIN PINJ1
|
|
#define PJ1_RPORT PINJ
|
|
#define PJ1_WPORT PORTJ
|
|
#define PJ1_DDR DDRJ
|
|
#define PJ1_PWM NULL
|
|
#undef PJ2
|
|
#define PJ2_PIN PINJ2
|
|
#define PJ2_RPORT PINJ
|
|
#define PJ2_WPORT PORTJ
|
|
#define PJ2_DDR DDRJ
|
|
#define PJ2_PWM NULL
|
|
#undef PJ3
|
|
#define PJ3_PIN PINJ3
|
|
#define PJ3_RPORT PINJ
|
|
#define PJ3_WPORT PORTJ
|
|
#define PJ3_DDR DDRJ
|
|
#define PJ3_PWM NULL
|
|
#undef PJ4
|
|
#define PJ4_PIN PINJ4
|
|
#define PJ4_RPORT PINJ
|
|
#define PJ4_WPORT PORTJ
|
|
#define PJ4_DDR DDRJ
|
|
#define PJ4_PWM NULL
|
|
#undef PJ5
|
|
#define PJ5_PIN PINJ5
|
|
#define PJ5_RPORT PINJ
|
|
#define PJ5_WPORT PORTJ
|
|
#define PJ5_DDR DDRJ
|
|
#define PJ5_PWM NULL
|
|
#undef PJ6
|
|
#define PJ6_PIN PINJ6
|
|
#define PJ6_RPORT PINJ
|
|
#define PJ6_WPORT PORTJ
|
|
#define PJ6_DDR DDRJ
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#define PJ6_PWM NULL
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#undef PJ7
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#define PJ7_PIN PINJ7
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#define PJ7_RPORT PINJ
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#define PJ7_WPORT PORTJ
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#define PJ7_DDR DDRJ
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#define PJ7_PWM NULL
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#undef PK0
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#define PK0_PIN PINK0
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#define PK0_RPORT PINK
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#define PK0_WPORT PORTK
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#define PK0_DDR DDRK
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#define PK0_PWM NULL
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#undef PK1
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#define PK1_PIN PINK1
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#define PK1_RPORT PINK
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#define PK1_WPORT PORTK
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#define PK1_DDR DDRK
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#define PK1_PWM NULL
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#undef PK2
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#define PK2_PIN PINK2
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#define PK2_RPORT PINK
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#define PK2_WPORT PORTK
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#define PK2_DDR DDRK
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#define PK2_PWM NULL
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#undef PK3
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#define PK3_PIN PINK3
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#define PK3_RPORT PINK
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#define PK3_WPORT PORTK
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#define PK3_DDR DDRK
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#define PK3_PWM NULL
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#undef PK4
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#define PK4_PIN PINK4
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#define PK4_RPORT PINK
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#define PK4_WPORT PORTK
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#define PK4_DDR DDRK
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#define PK4_PWM NULL
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#undef PK5
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#define PK5_PIN PINK5
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#define PK5_RPORT PINK
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#define PK5_WPORT PORTK
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#define PK5_DDR DDRK
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#define PK5_PWM NULL
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#undef PK6
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#define PK6_PIN PINK6
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#define PK6_RPORT PINK
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#define PK6_WPORT PORTK
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#define PK6_DDR DDRK
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#define PK6_PWM NULL
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#undef PK7
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#define PK7_PIN PINK7
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#define PK7_RPORT PINK
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#define PK7_WPORT PORTK
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#define PK7_DDR DDRK
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#define PK7_PWM NULL
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#undef PL0
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#define PL0_PIN PINL0
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#define PL0_RPORT PINL
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#define PL0_WPORT PORTL
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#define PL0_DDR DDRL
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#define PL0_PWM NULL
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#undef PL1
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#define PL1_PIN PINL1
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#define PL1_RPORT PINL
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#define PL1_WPORT PORTL
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#define PL1_DDR DDRL
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#define PL1_PWM NULL
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#undef PL2
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#define PL2_PIN PINL2
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#define PL2_RPORT PINL
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#define PL2_WPORT PORTL
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#define PL2_DDR DDRL
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#define PL2_PWM NULL
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#undef PL3
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#define PL3_PIN PINL3
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#define PL3_RPORT PINL
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#define PL3_WPORT PORTL
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#define PL3_DDR DDRL
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#define PL3_PWM &OCR5AL
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#undef PL4
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#define PL4_PIN PINL4
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#define PL4_RPORT PINL
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#define PL4_WPORT PORTL
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#define PL4_DDR DDRL
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#define PL4_PWM &OCR5BL
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#undef PL5
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#define PL5_PIN PINL5
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#define PL5_RPORT PINL
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#define PL5_WPORT PORTL
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#define PL5_DDR DDRL
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#define PL5_PWM &OCR5CL
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#undef PL6
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#define PL6_PIN PINL6
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#define PL6_RPORT PINL
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#define PL6_WPORT PORTL
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#define PL6_DDR DDRL
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#define PL6_PWM NULL
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#undef PL7
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#define PL7_PIN PINL7
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#define PL7_RPORT PINL
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#define PL7_WPORT PORTL
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#define PL7_DDR DDRL
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#define PL7_PWM NULL
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#endif // _FASTIO_1280
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